ASIC / SoC Verification

Background

Comprehensive UVM-based verification environments ensuring complete coverage.

We develop advanced, reusable UVM verification environments for ASIC and SoC designs. Our process includes functional coverage, assertions, and protocol checkers to achieve full verification closure.

Case Study

The Problem

Modern SoCs integrate multiple IPs with complex interactions, leading to high verification challenges.

Our Solutions

We provide scalable verification environments, functional coverage models, and assertions to detect bugs early and ensure compliance with specifications.

Related Insights

VESA Display Stream Compression (DSC) Decoder

Implemented and verified DSC Decoder with golden-model checks over all standard modes.

MIPI Video Bridges (DPI ↔ DSI / CSI-2)

Designed and verified multiple MIPI video bridges for display/camera paths (RGB888/666, YUV420/422, RAW10/12).

RPC IoT DRAM Controller

Designed and verified an RPC DRAM controller with DFI PHY interface and AXI/APB control.

VESA Display Stream Compression (DSC) Encoder

Designed and verified a high-performance VESA DSC Encoder across RGB/YUV modes and 8–16-bit depths.

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